能帮我看下 这个Type integer does not match with a string literal是怎么回事么、谢谢啦LIBRARY ieee;USE ieee.std_logic_1164.ALL;-- Uncomment the following library declaration if using-- arithmetic functions with Signed or Unsigned value
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![能帮我看下 这个Type integer does not match with a string literal是怎么回事么、谢谢啦LIBRARY ieee;USE ieee.std_logic_1164.ALL;-- Uncomment the following library declaration if using-- arithmetic functions with Signed or Unsigned value](/uploads/image/z/7283763-27-3.jpg?t=%E8%83%BD%E5%B8%AE%E6%88%91%E7%9C%8B%E4%B8%8B+%E8%BF%99%E4%B8%AAType+integer+does+not+match+with+a+string+literal%E6%98%AF%E6%80%8E%E4%B9%88%E5%9B%9E%E4%BA%8B%E4%B9%88%E3%80%81%E8%B0%A2%E8%B0%A2%E5%95%A6LIBRARY+ieee%3BUSE+ieee.std_logic_1164.ALL%3B--+Uncomment+the+following+library+declaration+if+using--+arithmetic+functions+with+Signed+or+Unsigned+value)
能帮我看下 这个Type integer does not match with a string literal是怎么回事么、谢谢啦LIBRARY ieee;USE ieee.std_logic_1164.ALL;-- Uncomment the following library declaration if using-- arithmetic functions with Signed or Unsigned value
能帮我看下 这个Type integer does not match with a string literal是怎么回事么、谢谢啦
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--USE ieee.numeric_std.ALL;
ENTITY vv IS
END vv;
ARCHITECTURE behavior OF vv IS
-- Component Declaration for the Unit Under Test (UUT)
COMPONENT comp
PORT(
a :IN integer range 0 to 7;
b :IN integer range 0 to 7;
sel :IN std_logic;
x1 :OUT std_logic;
x2 :OUT std_logic;
x3 :OUT std_logic
);
END COMPONENT;
--Inputs
signal a :integer range 0 to 7 :="00000010" ;
signal b :integer range 0 to 7 := "00000100";
signal sel :std_logic := '0';
\x05--Outputs
signal x1 :std_logic;
signal x2 :std_logic;
signal x3 :std_logic;
-- No clocks detected in port list.Replace below with
-- appropriate port name
BEGIN
\x05-- Instantiate the Unit Under Test (UUT)
uut:comp PORT MAP (
a => a,
b => b,
sel => sel,
x1 => x1,
x2 => x2,
x3 => x3
);
END;
能帮我看下 这个Type integer does not match with a string literal是怎么回事么、谢谢啦LIBRARY ieee;USE ieee.std_logic_1164.ALL;-- Uncomment the following library declaration if using-- arithmetic functions with Signed or Unsigned value
signal a :integer range 0 to 7 :="00000010" ;
signal b :integer range 0 to 7 := "00000100";
上面两句有问题,既然a和b的类型是整型的子类型 integer range 0 to 7,其初值就只能是0~7当中的某个数,例如2或者4等等:
signal a :integer range 0 to 7 :=2 ;
signal b :integer range 0 to 7 := 4;